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stereo 2w audio power am plifier AA4002 data sheet 1 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited general description the AA4002 is a monolithic stereo audio power amplifier including dc volume control, a selectable gain/bass boost, and stereo bridged audio power ampli- fiers, with the capability of producing 2w into 4 ? with thd+n less than 1%. the AA4002 is specially designed for notebook pc, lcd monitor and portable media player. the AA4002 features low power consumption in shut- down mode, power amplifier and headphone mute for maximum system flexibility and performance. it also provides thermal shutdown protection. the AA4002 is available in tssop-28 with exposed- dap package. features dc volume control interface, 0db to -78db, 31 steps system beep detect very low power consumption in shutdown mode, i sd =0.7 a stereo power output for speakers/headphones with btl mode/se mode selectable internal/external gain bass boost pop noise suppression circuit thermal shutdown protection applications notebook pc lcd monitor portable dvd player portable media player digital photo frame figure 1. package type of AA4002 tssop-28 with exposed-dap
stereo 2w audio power am plifier AA4002 data sheet 2 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited pin configuration figure 2. pin configuration of AA4002 gnd shutdown gain select mode mute v dd dc vol gnd right dock right in beep in left in left dock gnd right out+ v dd right out- right gain 2 right gain 1 gnd bypass hp sense gnd left gain 1 left gain 2 left out - v dd left out+ 1 2 3 4 5 6 7 8 9 28 27 26 25 24 23 22 10 11 21 20 19 18 12 13 14 17 16 15 g package ( tssop-28 with exposed-dap )
stereo 2w audio power am plifier AA4002 data sheet 3 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited pin description pin number pin name function 1, 8, 14, 20, 23 gnd ground for circuitry. 2 shutdown shutdown mode control signal input, place entire ic in shutdown mode when held high, i dd =0.7 a. 3 gain select gain select input pin, logic high will switch the amplif ier to external gain mode, and logic low will switch to internal unity gain. 4 mode mode select input pin, fixed gain when logic l and gain adjustable mode when logic h. 5 mute mute control i nput pin, active h. 6, 16, 27 v dd supply voltage input pin. 7 dc vol volume control function input pin. 9 right dock right docking output pin. 10 right in right cha nnel audio input pin. 11 beep in beep signal input pin. 12 left in left channel audio input pin. 13 left dock left docking output pin. 15 left out+ left channel positive output pin. 17 left out- left channel negative output pin. 18 left gain 2 connect pin 2 of the external gain setting resist or for left channel. 19 left gain 1 connect pin 1 of the external gain setting resist or for left channel. 21 hp sense headphone sense control pin. 22 bypass bypass pin. 24 right gain 1 connect pin 1 of the external gain setting resistor for right channel. 25 right gain 2 connect pin 2 of the external gain setting resistor for right channel. 26 right out- right cha nnel negative output pin. 28 right out+ right cha nnel positive output pin.
stereo 2w audio power am plifier AA4002 data sheet 4 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited functional block diagram figure 3. functional block diagram of AA4002 right out+ left out- left out+ left dock left in right in beep in right dock mode control + _ beep detect power management click and pop suppression circuitry volume control 3 1 steps 10k ? 20k ? 20k ? 20k ? 20k ? 10k ? 10k ? 10k ? gain select mode mute hp sense dc vol shutdown bypass gnd v dd + _ + _ + _ + _ + _ bias 1, 8, 14, 20, 23 2 3 4 5 6, 16, 27 7 9 10 11 12 13 15 17 18 19 left gain 2 left gain 1 21 22 right gain 1 24 right gain 2 25 28 right out- 26 bias
stereo 2w audio power am plifier AA4002 data sheet 5 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited gain sel mode headphone sense mute shutdown output stage set to dc volume output stage configuration 0 0 0 0 0 internal gain fixed btl 0 0 1 0 0 internal gain fixed se 0 1 0 0 0 internal gain adjustable btl 0 1 1 0 0 internal gain adjustable se 1 0 0 0 0 external gain fixed btl 1 0 1 0 0 external gain fixed se 1 1 0 0 0 external gain adjustable btl 1 1 1 0 0 external gain adjustable se xx x10muted xmuted x x x x 1 shutdown x x ordering information circuit type e1: lead free AA4002 - truth table for logi c inputs (note 1) note 1: if system beep is detected on the beep in pin, th e system beep will be passed th rough the bridged amplifier regardless of the logic of the mute and hp sense pins. package temperature range part number marking id packing type tssop-28 with exposed-dap -40 to 85 AA4002g-e1 AA4002g-e1 tube AA4002gtr-e1 AA4002g-e1 tape & reel package g: tssop-28 with exposed-dap tr: tape and reel blank: tube bcd semiconductor's pb-free products, as designated with "e1" suffix in th e part number, are rohs compliant.
stereo 2w audio power am plifier AA4002 data sheet 6 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited parameter symbol value unit supply voltage v dd 6.0 v input voltage v in -0.3 to v dd + 0.3 v power dissipation p d internally limited esd (machine model) esd 200 (note 3) v operating junction temperature t j 150 o c storage temperature t stg -65 to 150 o c lead temperature (soldering 10s) t l 260 o c package thermal resistance r ja (note 4) 45 o c/w absolute maximum ratings (note 2) note 2: stresses greater than those listed under "absolute maximum ratings" may cause permanen t damage to the device. these are stress ratings only, and functi onal operation of the device at these or any other cond itions beyond those indicated i n the operation is not implied. exposure to "absolute maximum ratings" for extended periods ma y affect device reliability. note 3: this device is manufactured on a cm os process. it is therefor e generically susceptible to damage from ex cessive static voltages. proper esd precautions must be taken during handling and storage of this device. note 4: the chip is soldered to 200mm 2 copper of 1oz. with 12x0.5mm vias. recommended operating conditions parameter symbol min max unit supply voltage v dd 2.7 5.5 v operating temperature t a -40 85 o c
stereo 2w audio power am plifier AA4002 data sheet 7 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited p a r a m e t e r s y m b o l c o n d i t i o n s min ty p m a x u n i t standby and logical section supply voltage v dd 2.7 5.5 v quiescent power supply current i dd v in =0v, i out =0a 11 30 ma shutdown current i sd v shutdown =v dd 0.7 2.0 a headphone sense high input voltage v ih 4v headphone sense low input voltage v il 0.8 v (mute, shutdown, mode, gain select) high input voltage v ih 3 v (mute, shutdown, mode, gain select) low input voltage v il 1 v volume attenuators section attenuator range c range v vol =5v (dc), no load 0.75 db v vol =0v (dc), btl and se mode -75 db mute attenuation a m v mute =5v, btl mode -78 db v mute =5v, se mode -78 db single-ended (se) mode section output power p out thd=1%, f=1khz, r l =32 ? 85 mw thd=10%, f=1khz, r l =32 ? 95 total harmonic dist ortion + noise thd+n v out =1v rms , f=1khz, r l =10k ? , a vd =1 0.065 % power supply rejection ratio psrr c b =1.0 f, f=120khz, r l =32 ?, v ripple =200mv rms 58 db signal to noise ratio snr p out =75mw, r l =32 ? , a-wtd filter 102 db channel separation f=1khz, c b =1.0 f65db btl mode section output offset voltage v os v in =0v, no load 5 50 mv output power p out thd+n=1%, f=1khz, r l =4 ? , lpf=22khz 2 w thd+n=1%, f=1khz, r l =8 ? , 1.0 1.1 thd+n=10%, f=1khz, r l =8 ? ,1.5 total harmonic dist ortion + noise thd+n p out =1.0w, r l =4 ? , a vd =2 20hz stereo 2w audio power am plifier AA4002 data sheet 8 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited p a r a m e t e r s y m b o l c o n d i t i o n s min ty p m a x u n i t btl mode section (continued) signal to noise ratio snr p out =1.1w, r l =8 ? , a-wtd filter 93 db channel separation c b =1.0 f, f=1khz 70 db electrical characteristics (continued) (v dd =5v, t a =25 o c, unless otherwise specified.) typical performance characteristics figure 5. thd+n vs. output power figure 6. thd+n vs. output power figure 7. psrr vs. frequency 100m 1 0.1 1 10 1khz 20khz 20hz v dd =5v btl mode r l =3.9 ? lpf=80khz thd+n (%) output power (w) 10 100 0.01 0.1 1 10 v dd =5v se mode r l =33 ? lpf=80khz 1khz (c out =220 f) 20khz (c out =220 f) 20hz (c out =1000 f) thd+n (%) output power (mw) 100 1k 10k -100 -80 -60 -40 -20 0 20k 20 v dd =5v se mode c b =1.0 f v ripple =200mv rms psrr (db) frequency (hz) 10m 100m 1 0.1 1 10 1khz 20khz 20hz v dd =5v btl mode r l =8.2 ? lpf=80khz thd+n (%) output power (w) figure 4 . thd+n vs. output power
stereo 2w audio power am plifier AA4002 data sheet 9 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited figure 9. thd+n vs. frequency typical performance ch aracteristics (continued) figure 10. output power vs. supply voltage figure 11. output power vs. supply voltage figure 8. thd+n vs. frequency 100 1k 10k 0.1 1 10 v dd =5v se mode r l =33 ? po=75mw c out =1000 f lpf=80khz 20 thd+n (%) frequency (hz) 100 1k 10k 0.1 1 20 v dd =5v btl mode r l =3.9 ? po=1.5w lpf=30khz thd+n (%) frequency (hz) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 20 40 60 80 100 120 140 160 se mode f=1khz r l =33 ? thd=1% lpf=80khz output power (mw) supply voltage (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 20 40 60 80 100 120 140 160 se mode f=1khz r l =33 ? thd=10% lpf=80khz output power (mw) supply voltage (v)
stereo 2w audio power am plifier AA4002 data sheet 10 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited typical performance ch aracteristics (continued) figure 13. out put power vs. power supply figure 14. output power vs. load resistance figure 12. output power vs. supply voltage figure 15. output power vs. load resistance 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 btl mode r l =8.2 ? f=1khz thd=1% output power (w) supply voltage (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 btl mode r l =8.2 ? f=1khz thd=10% output power (w) supply voltage (v) 8.0 16.0 24.0 32.0 40.0 48.0 56.0 64.0 0 50 100 150 200 250 300 350 400 450 500 550 600 650 700 v dd =5v se mode f=1khz lpf=80khz output power (mw) load resistance ( ? ) thd+n=1% thd+n=10% 8.0 16.0 24.0 32.0 40.0 48.0 56.0 64.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 load resistance ( ? ) v dd =5v btl mode f=1khz lpf=80khz output power (w) thd+n=1% thd+n=10%
stereo 2w audio power am plifier AA4002 data sheet 11 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited typical performance ch aracteristics (continued) figure 16. power dissipation vs. output power figure 17. power dissipation vs. output power figure 18. supply current vs. supply voltage figure 19. volume control characteristics 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -80 -70 -60 -50 -40 -30 -20 -10 0 attenuation (db) volume control voltage (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 2 4 6 8 10 12 14 16 18 20 v in =0mv i o =0ma se mode btl mode supply current (ma) supply voltage (v) 0.0 40.0m 80.0m 120.0m 160.0m 200.0m 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 0.22 0.24 0.26 AA4002 r l =33 ? v dd =5v se mode f=1khz thd< 1% lpf=80khz power dissipation (w) output power (w) AA4002 r l =8 ? 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v dd =5v btl mode f=1khz r l =3.9 ? power dissipation (w) output power (w)
stereo 2w audio power am plifier AA4002 data sheet 12 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited typical performance ch aracteristics (continued) figure 21. external gain/bass boost characteristics figure 20. channel separation vs. frequency 20 50 100 200 300 500 1k 2k 5k 10k 20k 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v dd =5v r l =8.2 ? r i =r bs =r f =20k ? c bs =0.1 f c bs =0.22 f c bs =0.068 f output level (db) frequency (hz) 100 1k 10k -80 -70 -60 -50 -40 20 vdd=5v se mode r l =33 ? f=1khz c b =1 f channel separation (db) frequency (hz)
stereo 2w audio power am plifier AA4002 data sheet 13 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information se/btl mode, hp_sense pin the AA4002 can be operated in 2 types of output configurations, se (single-ended) mode and btl (bridged-tied-load) mode, determined by hp_sense pin (pin 21) logic level. (here is the discussion about left channel only, it also applies to right channel.) if applying high level to pin 21, the output of op2 unit is in high impedance, the chip operates in se mode. there is no current loop between out+ and out-, also no power consumption. when hp_sense pin is held low, op2 unit is turned on, the chip operates in btl mode. ac signal at out+ is -180 o phase shift of out-. op2 has fixed unity gain internally, so dc components (bias voltage, approx 1/2 v dd ) between out+, out- is canceled. there is no need for dc block capacitors in system. in btl mode, voltage between speaker load is about 2 times that in se mode, so there is 4 times output power compared to se mode with same load. in se mode, output audio signal rides on bias voltage at out-, so it is necessary to use capacitor to block dc bias and couple ac signal. see figure 28 typical application circuit. it is recommended to connect hp_sense to the control pin of headphone jack, illustrated in figure 28. when headphone plug is not inserted, the voltage of hp_sense pin is determined by voltage divider formed by r pu , r l . for given resistors value in figure 28, r pu =100k, r l =1.5k, dc voltage at hp_sense is about 75mv. ac signal equals output amplitude of out- through c out , so signal at hp_sense node is 75mv dc plus ac signal. the maximum peak-to- peak voltage at out- is not greater than v dd =5.0v supply voltage, so the positive maximum voltage of hp_sense node is not greater than 2.5v+75mv=2.575v, which can not reach hp_sense input high level minimum value (4.0v), there is no risk of mode switching between se and btl. hp_sense pin can also be connected to mcu i/o port, it is necessary to note that AA4002 still can drive headphone even in btl mo de because out- is always active whatever se or btl mode. internal/external gain, gain select pin the AA4002 provides 2 sel ectable feedback loops, internal and external determined by select pin (pin 3) logic level. applying low level to select pin, the AA4002 switches to internal feedback loop, op1 works as unity gain. if applying high level to select pin, external components ar e used as feedback loop, and the gain is expressed by formula below. ..............................(1) here zc bs is the impedance of bass boost capacitor, zc bs =1/2 *f*c bs . so a vfb approaches 2 points, a vfblf at low frequency, a vfbhf at high frequency, expressed by formula 2 and 3. .............................................(2) ........................................................(3) bass boost from above discussion, the AA4002 can improve gain of audio signal at low frequency, which is hard to listening for human ears relative to middle band (2khz to 3khz). the boost corner frequency is determined by formula 4. figure 22. btl configuration in left channel i f bs bs vfb r r zc r a + = ) // ( i f bs vdlf r r r a + = i f vfbhf r r a = 10k ? 20k ? 20k ? 10k ? left out- left out+ + _ + _ 17 15 bias + c out 220 f r l 1.5k ? op1 op2
stereo 2w audio power am plifier AA4002 data sheet 14 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information (continued) ..............................................(4) assuming r bs =r f =r i =20k ? , c bs =0.068 f and f bs =117hz, the bass boost characteristic is shown in figure 21. fixed gain/adjustable gain loop, mode pin, dc volume control the AA4002 can be set in fixed gain or adjustable gain, according to applying high or low le vel to mode pin (pin 4). low level is for fixed gain, high level is for adjustable gain, which permits to change volume by applying various dc voltages to dc vol pin (pin7). table 1 shows the relationship of volume attenuation vs. the voltage of dc vol pin. there are 31 steps from 0 to -78db; step size is different for different volume control voltage, 1db/step from 0db to -6db, 2db/step from -6db to -36db, 3db/step from -36db to -47db, 4db/step from -47db to -51db, 5db/step from -51db to -66db, the last step is 12db from -66db to -78db. for example, increasing vo ltage applied to dc vol pin from 3.437v (point b in figure 23) to 3.562v (point d), gain will change one step from -4db to -3db (point f). bs bs bs c r f 2 1 = table 1. volume attenuation vs. dc vol pin voltage v dd =5v attenuation (db) high level (v) low level (v) 0 5 3.875 -1 3.937 3.750 -2 3.812 3.625 -3 3.687 3.500 -4 3.562 3.375 -5 3.437 3.250 -6 3.312 3.125 -8 3.187 3.000 -10 3.06 2.875 -12 2.937 2.750 -14 2.812 2.625 -16 2.687 2.500 -18 2.562 2.375 -20 2.437 2.250 -22 2.312 2.125 -24 2.187 2.000 -26 2.062 1.875 -28 1.937 1.750 -30 1.812 1.625 -32 1.687 1.500 -34 1.562 1.375 -36 1.437 1.250 -39 1.312 1.125 -42 1.187 1.000 -45 1.062 0.875 -47 0.937 0.750 -51 0.812 0.625 -56 0.687 0.500 -61 0.562 0.375 -66 0.437 0.250 -78 0.312 0 figure 23. volume attenuation vs. dc vol pin vo l t a g e
stereo 2w audio power am plifier AA4002 data sheet 15 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information (continued) but, decreasing voltage from 3.562v (point f), gain does not change immediately, the change occurs at 3.5v (point e). there is a hysteresis which guarantees that the volume control is monotonic, with immunity against noise coupled from system. in above table 1, the column of low level means the lower threshold voltage with the voltage of dc vol varying from high to low, high level column means the other upper threshold voltage dc vol voltage varying from low to high. mute, shutdown when applying high level to mute pin (pin 5), the AA4002 will mute output stage stereo dock output- whatever in btl or se mode. the AA4002 offers shutdown function which can further reduce power consumption. shutdown pin (pin 2) should be held low in normal operation. if applying high level to shutdown pin, the AA4002 will turn off internal bias circuits, enter into shutdown mode with very low quiescent current, 0.7 a typ. mute, shutdown pin should be tied to high or low level to avoid undes- ired operation state. left/right dock output there are stereo amplifiers built-in AA4002 front-end input stages. it provide very low distortion audio moni- tor signal for line out, the pass-band gain is determined by external feedback resistors, .....................................(5) the dock output is also used as input source for back- end amplifiers, so the gain of docking output (a vdock ) will affect total loop gain. the function of c out(l/r) (0.1 f) serial in left/right dock output is to remove dc bias. beep detect beep feature is used in notebook pc system for alert- ing. if peak-to-peak voltage of beep signal applied to beep detect pin (pin 11) exceeds a certain voltage called detect voltage, the feature will be activated, then AA4002 will be forced at btl mode with internal fixed gain, ignoring mute and hp_sense pin logic level. for AA4002, v detect is about 2.8v. beep sig- nal passes through left/right channel input path, the gain under btl load is only dependent on the ratio of r f(l/r) to r beep . .................................(6) for resistors value given in figure 28, a vbeep is about 0.2 (-14db). if this feature is not used, connecting the capacitor (c beep ) to ground, it is recommended removing two resistors (r beep , 200k ? ), to minimize crosstalk between left and right channel. c i , c out , c b and c s (power supply bypassing capacitor) selection for input stages of left/right channel, input capacitors (c il , c ir ), are used to accommodate different dc level between input source and AA4002 bias voltage (about 1/2 vdd). input capacitors (c il , c ir ) and input resistors (r il , r ir ) form first order high pass filters, which determine the corner frequency, ..........................(7) for given values in figure 28, r il =r ir =20k ? , c il =c ir =0.33 f, the corner freque ncy of input stage is about 24hz. similarly, for output stage in se mode, output capacitor (c out ), and headphone load also form a first order high pass filter, and its cut-off frequency is determined by classic formula below. ....................(8) for bypass capacitor (c b ), the purpose is to filter internal bias noise, reduce harmonic distortion, and improve power supply rejection ratio performance. tantalum or ceramic cap acitor with low esr is recommended, and is placed as close as possible to chip bypass pin in pcb layout. both input and output ) / ( ) / ( ) / ( r l i r l f r l vdock r r a = beep r l f r l vbeep r r a ) / ( ) / ( 2 ? = ) / ( ) / ( ) / ( 2 1 r l i r l i r l ci c r f ? = ) / ( ) / ( ) / ( 2 1 r l o r l hp r l co c r f ? =
stereo 2w audio power am plifier AA4002 data sheet 16 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information (continued) signal ride on such reference voltage, the chip can not work until internal dc bias is set up completely. so the size of c b can also affect the ch ip start-up time, which is approx linearly proportional to the value of bypass capacitor. for AA4002, here are the start-up times for several typical capacitor values. for AA4002 power supply, it is better to use individual power source generated from voltage regulators split from video, digital circuit units in system. for bypassing capacitors, it is recommended to use one electrolytic capacitor of 4.7 f to 10 f in parallel with 0.1 f ceramic capacitor which is located close to the part. setup proper gain, design example the total closed loop gain is determined by three individual units - input st age, feedback network and output stage. input stage, pass-band gain ...................................................(9) feedback network, internal pass-band gain, a vfb =1, for external gain, see formula 1, 2, 3. output stage, for btl mode, a vout =2, for se mode, a vout =1. so the total pass-band gain of AA4002, a vtotal is, ........................(10) according to formulas above, it is easy to plot amplitude-frequency charact eristic curve. the lower corner frequency is dependant on a vin , a vout , bass boost feature relies on a vout . example v dd =5v, r l =8 ? , btl configuration, desired output power each channel, p o =1.0w, thd+n 1%. input signal, v in =1.0vrms from d-a converter. step 1 , to check if the chip can deliver 1w to 8 ? load with the limitation of thd+n 1%, v dd =5v by figure 6, 15. step 2 , if yes, to calculate output voltage, . so total pass-band gain (ignoring bass boost feature, low frequency attenuation caused by ac coupling capacitors, a vfb =1x.), a vtotal =v out /v in =2.83x. step 3 , a vin =a vtotal /( a vfb *a vout )=2.83/(1*2)=1.415, r f(l/r) =a vin *r i(l/r) , assuming components values are given in figure 28, just changing r f(l/r) to 20k ? *1.415=28.3k ? . select the closest standard value 28k ? . optimizing click/pop noise the AA4002 includes a circuit to suppress click/ pop noise during power up/down transition. in practi- cal application, the chip can effectively suppress common mode signal including click/pop noise in btl configuration. in se mode, decreasing the size of output capacitor (c out ) can minish pop noise, which can also affect low frequency response according to formula 8 above. increas ing bypass capacitor value (c b ) can slower ramp of charge, prolong start-up time, mask most of transient noises before bias voltage is set-up. proper power on/off sequence can also optimize click/pop noise. the recommended is shown in figure 24. table 2. c b vs. start-up time c b ( f) start-up time (ms) 0.47 300 1.0 600 2.2 1300 ) / ( ) / ( r l i r l f vin r r a = vout vfb vin vtotal a a a a ? ? =
stereo 2w audio power am plifier AA4002 data sheet 17 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information (continued) 1) power on operation, en able mute, then enable shutdown; after v dd is stable, release shutdown first, then mute. 2) power off, enable mute , then enable shutdown; after v dd is discharged completely, release shutdown firstly, then mute. efficiency, power dissipation and thermal consideration in design for class-ab amplifier, figur e 11 is the basic equation of efficiency worked in btl configuration, ........................................................(11) here v p is peak voltage of output swing. thermal dissipation becomes major concern when output power is close to 2w especially in btl mode. the maximum power dissipation of package for AA4002 can be calculated by following equation. ........................................(12) here t jmax is maximum operating junction temperature 150 o c, t a is ambient temperature, ja is thermal resistance form junc tion to ambient. for g package (tssop-28 with exposed dap), it is 45 o c/w given in datasheet page 6. assuming t a is +25 o c, the maximum allowed power dissipation p dmax is about 2.78w according to formula 12. there is the other formula about power dissipation drawn from application for each channel which is determined by supply vo ltage and load resistance. (for se mode)....................(13) (for btl mode).................(14) if power dissipation calculated by application is larger than permissible by package, it is necessary to assemble additional heat si nking, or keep ambient temperature around the chip very low, or increasing load impedance, or decreasing power supply voltage. here is an example, assuming v dd =5.0v, r l =4 ? , stereo in btl mode, , for 2 channels, total power dissipation p dtotal =2* p dbtlmax =2*1.266=2.53w, according to formula 13, the maxim ambient temperature is, =150-45*2.53=36.2 o c that is to say, if user wants AA4002 can delivery maximum output power to 4 ? load, at v dd =5.0v, btl mode, ambient temperature has to hold less than 36.2 o c. when junction temp erature exceeds about +165 o c, thermal shutdown circuit built-in AA4002 figure 24. recommended se quences for power on/off v dd (v) (pin6,16,27) mute(v) (pin5) shutdown(v) (pin2) stby mute stby mute off off play dd p v v 4 = ja a jmax dmax t t p ? = l dd dsemax r v p 2 2 2 = l dd dbtlmax r v p 2 2 2 = w r v p l dd dbtlmax 266 . 1 4 14 . 3 5 2 2 2 2 2 2 = = = dbtlmax ja jmax a p t t ? ? =
stereo 2w audio power am plifier AA4002 data sheet 18 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information (continued) will turn off output stage to limit total power dissipation. there is an exposed thermal pad on bottom of the chip to provide the direct therma l path from die to external heat sink. it is recommended to use copper on the surface of pc board as heat sink for AA4002. to dig some matrix regular holes under chip, set diameter for each hole at 0.8~1.0mm, k eep distance around 1.7mm between holes, remove copper solder mask of this area, and make sure to keep them contact well when soldering to pcb. see figure 24. recommended pcb layout for AA4002 using wide traces for power supply, output power to reduce losses caused by parasitic resistance is recommended, which can al so help to release heat away from the chip. it is recommended to place bypass capacitor, power supply bypa ssing capacitors as close as possible to the chip. figure 25, 26 shows the recommended layout of double layer pcb. figure 25. copper and holes under the chip figure 26. top route, copper and silkscreen
stereo 2w audio power am plifier AA4002 data sheet 19 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited application information (continued) figure 27. bottom route, copper and silkscreen
stereo 2w audio power am plifier AA4002 data sheet 20 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited typical application figure 28. typical application of AA4002 mode control + _ beep detect r ir 20k ? power management click and pop suppression circuitry volume control 31 steps 10k ? 20k ? 20k ? 20k ? 20k ? 10k ? 10k ? 10k ? dc volume control gain select mode mute hp sense to control pin on headphone jack r bs 20k ? r bs 20k ? c bs 0.068 f right out+ left out- right out - left out+ shutdown + _ + _ + _ + _ + _ bias r il 20k ? r pu 100k ? c v 0.1 f 0.1 f r fl 20k ? + c b 1 f r l 1.5k ? 100k ? + c outl left dock audio in left 0.33 f r beep 200k ? + beep in audio in right r fr 20k ? c s1 c s c s 10 f 0.1 f 0.1 f 224 25 22 1, 8, 14, 20, 23 6, 16, 27 gnd 9 c ir 0.33 f 10 11 12 13 c il 4 5 21 37 19 18 17 15 26 left gain 2 left gain 1 r i 20k ? right gain 1 right gain 2 to hp sense circuit control pin pin ring sleeve headphone jack tip bias + + r s + c outr 1 f v dd left in bypass c bs 0.068 f c out 220 f dc vol v dd v dd v dd right dock right in 28 c out 220 f r l 1.5k ? beep in left dock right dock r beep 200k ? r i 20k ? r f 20k ? r f 20k ? r w 10k ? +
stereo 2w audio power am plifier AA4002 data sheet 21 sep. 2006 rev. 1. 1 bcd semiconductor manufacturing limited mechanical dimensions tssop-28 with exposed-dap unit: mm(inch) 0.090(0.004) 0.200(0.008) 0.650(0.026) bsc 0.190(0.007) 0.300(0.012) 0.050(0.002) 0.150(0.006) 0.800(0.032) 1.050(0.041) 1.200(0.047)max 2.740(0.108) 3.050(0.120) 5.640(0.222) 5.940(0.234) exposed pad 0.450(0.018) 0.750(0.030) 4.300(0.169) 4.500(0.177) 0 8 gauge line 0.250(0.010) seating plane 6.250(0.246) 6.550(0.258) pin #1 id. 9.600(0.378) 9.800(0.386) base plane
important notice bcd semiconductor manufacturing limite d reserves the right to make changes without further notice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing limited 800, yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 bcd semiconductor manufacturing limited main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd. shenzhen office advanced analog circuits (shanghai) corporation shenzhen office room e, 5f, noble center, no.1006, 3rd fuzhong road, futian district, shenzhen 518026, china tel: +86-755-8826 7951, fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808, fax: +886-2-2656 2806 usa office bcd semiconductor corporation 3170 de la cruz blvd., suite 105, santa clara, ca 95054-2411, u.s.a - ic design group advanced analog circuits (shanghai) corporation 8f, zone b, 900, yi shan road, shanghai 200233, china tel: +86-21-6495 9539, fax: +86-21-6485 9673 bcd semiconductor manufacturing limited http://www.bcdsemi.com

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